LXF31K18 LXF31K18
LXF31K18 LXF31K18
The LXF31K18 is an eight channel 3U VPX data acquisition board with 310 Msps ADC,16 bits resolution and a Xilinx Kintex Ultrascale FPGA.


0,200 KG

Request a quotation
LXF31K18 - eight channels 3U VPX, 310 Msps ADC with 16-bits resolution
A combination of eight analog to digital converter channels and a Xilinx Kintex Ultrascale makes the LXF31K18 the ideal platform for embedded signal processing applications such as Electronic Warfare, Radar receiver, instrumentation or MIMO communication applications. The LXF31K18 is fully compliant to the Vita65.0 openVPX standard and the VITA46.11 VPX shelf management standard.
Analog input
Depending on the application requirements it is possible to order the LXF31K18 with either a DC coupled or an AC coupled analog front end. The DC coupled interface is meant for signal acquisitions in the first Nyquist zone while the AC coupled inputs also offers the option for signal acquisition in the second Nyquist zone. The ADCs offer 16-bits resolution further contributing to achieve best in class signal to noise ratios.
Clock tree
The onboard low noise clock generator ensures easy integration into small single board systems as well as standalone operation. For larger systems it is possible to easily synchronize multiple boards by providing an external reference clock. This is a special feature offered by the onboard clock pll.
FPGA and Memory
The LXF31K18 comprises a Xilinx Kintex Ultrascale KU060 user programmable FPGA. Most of the logic, block RAM and all DSP resources are available for customer processing. With the KU060 FPGA the LXF31K18 offers; 663 K logics cells, 1,080 36 Kbit RAM blocs, 3 PCIe interface blocks and 2,760 DSP48 slices. The FPGA speed grade is -2. The LXF31K18 FPGA connects to one 72 bits wide DDR4 memory bank, offering a total of 4GB of storage with error correction codes. At 2400 Mhz the memory bank offers a total bandwidth of 21.6 GB/s. For FPGA configuration the LXF31K18 has a 64MB QSPI FLASH memory.
VPX interface
At the P1 connector the LXF31K18 has two fat pipes that form the data plane. At the expansion plane on P1 there are also two FAT pipes. Each fat pipe can be divided into two thin pipes or four ultra thin pipes. A total of thirty-two user definable LVDS signals connect between the FPGA and the VPX P2 connector. Two types of cooling are supported by the LXF31K18. For the harsher environmental conditions, the board can be ordered in the conduction cooled version. Otherwise the board is available in an air-cooled version.
Systems that will beneft greatly from this product are: 
  • Advanced digital radio frequency memory (DRFM)
  • Radar waveform generators and receivers
  • Telecommunicaton systems
  • Experimental Physics
  • Analog record and playback systems
  • Aerospace and test instrumentation
  • Software defined radio (SDR)
Contact us for more information.

Product Information

Number of analog input channels
Front panel IO connector type
Front panel IO type
FPGA type
Kintex Ultrascale - KU060 (530K logic Cells, 38Mb Block RAM, 2760 DSP slices)
Form Factor
VPX - 3U (VITA65.0 3U OpenVPX compliant)

Analog input specification

Input coupling
AC or DC coupled
Input maximum sample rate
310 Msps
Input number of bits
16 bits resolution
50 Ω
Input bandwidth AC coupled
10 MHz - 400 MHz
Input bandwidth DC coupled
DC - 200 MHz
Input AC full scale power
+12 dBm
Input DC full scale power
+6 dBm

Legislation and Environmental

Supported operating temperature
Commercial (0°C ~ 70°C) and Industrial (-40°C ~ 85°C)
standard Commercial Air-cooled and Rugged Conduction- cooled
ROHS Compliant
Yes - RoHS Phthalates Compliant
Product contains no SVHC (15-May-2020)
Country of origin
the Netherlands ( Europe)
Tariff Number (HS code)
84733020- Electronic assemblies of automatic data-processing machines