Wed, 25 Feb 2026 16:22:05 +0000 https://www.logic-x.eu/ Industrial grade isolated CameraLink FMC
The LXD40K0 FMC (FPGA Mezzanine Card) is designed to support Camera Link interfaces with galvanic isolation, ensuring electrical separation between the I/O and the FMC connector. The module is fully compatible with Base, Medium, and Full Camera Link standards, and can be reconfigured to support a dual Base Camera Link setup if required. 

Galvanic isolation
Unlike conventional FMC I/O modules, our isolated FMC products are specifically designed for high-voltage, high common-mode transient environments. Integrated galvanic isolation and high-CMTI digital isolators protect the FPGA and eliminate ground loop and EMC issues, simplifying system integration in demanding industrial applications.

Dual medium or quad Base
The LXD41K0 is part of the Logic-X stackable FMC product line, enabling flexible and scalable configurations.
An optional bottom-side FMC stacking connector routes the Lower LA[16:0] signals from the stack connector to the LA[33:17] of the top FMC connector.
As a result two LXD40K0 modules can be stacked on a single LPC site, creating either a dual medium or quad Base camera link interface
Other FMC modules requiring only LA[16:0] signals can also be combined in mixed configurations. This architecture enables scalable channel counts without requiring additional FMC sites. 

Applicatons
The LXD40K0 FMC is ideally suited for a wide range of systems that require robust, isolated Cameralink interface. Typical applications include:
Industrial Machine Vision Systems
FPGA-based frame grabbers for inspection, sorting, robotics, and quality control in electrically noisy environments.
Multi-Camera Vision Platforms
Dual Medium or Quad Base Camera Link systems using stacked FMC modules for synchronized multi-camera acquisition.
Scientific & High-Speed Imaging
Detector and camera readout systems requiring low-noise operation and ground-loop protection.
OEM Vision Integration
Embedded FPGA-based image processing systems for robotics, AI vision, and automated production equipment.
Legacy System Modernization
Replacement of traditional frame grabbers with isolated, FPGA-based acquisition platforms.

Contact us for more information.]]> Wed, 25 Feb 2026 14:36:26 +0000 LXD41K0 Industrial-Grade Isolated digital I/O FMC
The LXD41K0 FMC (FPGA Mezzanine Card) provides a robust, galvanically isolated digital interface for FPGA platforms. It supports 16 digital inputs, 16 digital outputs, one clock output, and isolated trigger input and output channels, delivering a total of 17 inputs and 18 outputs via an industry-standard 68-pin VHDCI connector.
All I/O signals use the 3.3 V LVCMOS standard.
Galvanic isolation
Unlike conventional FMC I/O modules, our isolated FMC products are specifically designed for high-voltage, high common-mode transient environments. Integrated galvanic isolation and high-CMTI digital isolators protect the FPGA and eliminate ground loop and EMC issues, simplifying system integration in demanding industrial applications.
18 bits inputs and 17 bits output
A total of 18 inputs and 17 outputs are available on the VHDCI 68-pin front-panel connector. 
Stackable FMC
The LXD41K0 is part of the Logic-X stackable FMC product line, enabling flexible and scalable configurations.
An optional bottom-side FMC stacking connector routes the Lower LA[16:0] signals from the stack connector to the LA[33:17] of the top FMC connector.
As a result two LXD41K0 modules can be stacked on a single LPC site, creating double  the isolated digital I/O ports.
Other FMC modules requiring only LA[16:0] signals can also be combined in mixed configurations. This architecture enables scalable channel counts without requiring additional FMC sites.
Applicatons
The LXD41K0 is ideally suited for systems requiring robust, isolated, and flexible digital I/O.
Industrial Control & Automation
Interfacing FPGA platforms with PLCs, motor drives, machine-control systems, and industrial equipment where isolation improves safety and EMC performance.

Automated Test & Measurement
High-channel-count digital interfaces for production test systems, pattern generation, logic analysis, and precision timing applications.

Scientific & Laboratory Instrumentation
Isolated trigger and synchronization signals for detector systems, timing architectures, and experimental setups requiring clean signal boundaries.

FPGA I/O Expansion & Prototyping
Scalable digital I/O expansion for FMC-based FPGA platforms, with stacking support enabling higher channel density or mixed-module configurations.
Contact us for more information.]]> Wed, 25 Feb 2026 13:41:26 +0000 LXF31K14 - four channels 3U VPX, 310 Msps ADC/DAC with 16-bits resolution
Four 16-bit A/D channels with up to 310 Msps data rate and four 16-bit D/A channels with up to 310 Msps data rate and a 1.24 Gsps update rate combined with a Xilinx Kintex Ultrascale makes the LXF33K14 the ideal platform for embedded signal processing applications such as Electronic Warfare, Wideband Radar transceiver or MIMO communication applications. The LXF33K14 is fully compliant to the Vita65.0 openVPX standard and the VITA46.11 VPX shelf management standard.
Analog input and output
Depending on the application requirements it is possible to order the LXF33K14 with either a DC coupled or an AC coupled analog front end. The DC coupled interface is meant for signal acquisitions and playback in the first Nyquist zone while the AC coupled inputs also offers the option for signal acquisition and playback in the second Nyquist zone. Both the ADC and DAC offer 16-bits resolution further contributing to achieve best in class signal to noise ratios.
Clock tree
The onboard low noise clock generator ensures easy integration into small single board systems as well as standalone operation. For larger systems it is possible to easily synchronize multiple boards by providing an external reference clock. This is a special feature offered by the onboard clock pll.
FPGA and Memory
The LXF31K18 comprises a Xilinx Kintex Ultrascale KU060 user programmable FPGA. Most of the logic, block RAM and all DSP resources are available for customer processing. With the KU060 FPGA the LXF31K18 offers; 663 K logics cells, 1,080 36 Kbit RAM blocs, 3 PCIe interface blocks and 2,760 DSP48 slices. The FPGA speed grade is -2. The LXF31K18 FPGA connects to one 72 bits wide DDR4 memory bank, offering a total of 4GB of storage with error correction codes. At 2400 Mhz the memory bank offers a total bandwidth of 21.6 GB/s. For FPGA configuration the LXF31K18 has a 64MB QSPI FLASH memory.
VPX interface
At the P1 connector the LXF31K18 has two fat pipes that form the data plane. At the expansion plane on P1 there are also two FAT pipes. Each fat pipe can be divided into two thin pipes or four ultra thin pipes. A total of thirty-two user definable LVDS signals connect between the FPGA and the VPX P2 connector. Two types of cooling are supported by the LXF31K18. For the harsher environmental conditions, the board can be ordered in the conduction cooled version. Otherwise the board is available in an air-cooled version.
Applicatons
Systems that will beneft greatly from this product are: 

• Digital Beam Forming
• MIMO Applications
• Radar waveform generators and receivers
• Telecommunicaton systems
• Experimental Physics
• Analog record and playback systems
• Aerospace and test instrumentation
• Software defined radio (SDR)

Contact us for more information.]]> Thu, 14 May 2020 11:02:55 +0000 LXF31K18 - eight channels 3U VPX, 310 Msps ADC with 16-bits resolution
A combination of eight analog to digital converter channels and a Xilinx Kintex Ultrascale makes the LXF31K18 the ideal platform for embedded signal processing applications such as Electronic Warfare, Radar receiver, instrumentation or MIMO communication applications. The LXF31K18 is fully compliant to the Vita65.0 openVPX standard and the VITA46.11 VPX shelf management standard.
Analog input
Depending on the application requirements it is possible to order the LXF31K18 with either a DC coupled or an AC coupled analog front end. The DC coupled interface is meant for signal acquisitions in the first Nyquist zone while the AC coupled inputs also offers the option for signal acquisition in the second Nyquist zone. The ADCs offer 16-bits resolution further contributing to achieve best in class signal to noise ratios.
Clock tree
The onboard low noise clock generator ensures easy integration into small single board systems as well as standalone operation. For larger systems it is possible to easily synchronize multiple boards by providing an external reference clock. This is a special feature offered by the onboard clock pll.
FPGA and Memory
The LXF31K18 comprises a Xilinx Kintex Ultrascale KU060 user programmable FPGA. Most of the logic, block RAM and all DSP resources are available for customer processing. With the KU060 FPGA the LXF31K18 offers; 663 K logics cells, 1,080 36 Kbit RAM blocs, 3 PCIe interface blocks and 2,760 DSP48 slices. The FPGA speed grade is -2. The LXF31K18 FPGA connects to one 72 bits wide DDR4 memory bank, offering a total of 4GB of storage with error correction codes. At 2400 Mhz the memory bank offers a total bandwidth of 21.6 GB/s. For FPGA configuration the LXF31K18 has a 64MB QSPI FLASH memory.
VPX interface
At the P1 connector the LXF31K18 has two fat pipes that form the data plane. At the expansion plane on P1 there are also two FAT pipes. Each fat pipe can be divided into two thin pipes or four ultra thin pipes. A total of thirty-two user definable LVDS signals connect between the FPGA and the VPX P2 connector. Two types of cooling are supported by the LXF31K18. For the harsher environmental conditions, the board can be ordered in the conduction cooled version. Otherwise the board is available in an air-cooled version.
Applicatons
Systems that will beneft greatly from this product are: 

• Advanced digital radio frequency memory (DRFM)
• Radar waveform generators and receivers
• Telecommunicaton systems
• Experimental Physics
• Analog record and playback systems
• Aerospace and test instrumentation
• Software defined radio (SDR)

Contact us for more information.]]> Thu, 14 May 2020 10:44:21 +0000 LXF33K00 5.4GSPS, 12 bits  Low latency wideband transceiver
A combination of low latency wideband analog to digital converter, digital to analog converter and Xilinx Kintex Ultrascale makes the LXF33K00 the ideal platform for embedded signal processing applications such as Electronic Warfare, Wideband Radar transceiver or wideband communication applications. The LXF33K00 is fully compliant to the Vita65.0 openVPX standard and the VITA46.11 VPX shelf management standard.
Analog input and output
With an analog input stage that has a very wide input bandwidth from 0.5MHz up-to 4.8GHz and the low latency 5.4Gsps ADC from E2V(EV12AS350A) the LXF33K00 delivers unmatched performance with regards to SFDR, close in phase noise and latency (7.2 ns). Sampling at 5.4 Gsps offers an instantaneous bandwidth of 2.7GHz. Surpassing the analog input, the analog output offers an even lower latency (1.2 ns) using the EV12DS460 DAC device from E2V. The output bandwidth ranges from 0.5MHz to 6GHz and the instantaneous output bandwidth is 1.35GHz. Both the ADC and DAC offer 12-bits resolution further contributing to achieve best in class signal to noise ratios.
Clock tree
The onboard low noise clock generator ensures easy integration into small single board systems as well as standalone operation. For larger systems it is possible to easily synchronize multiple boards by providing an external reference clock. This is a special feature offered by the onboard clock PLL.
FPGA and Memory
The LXF30K00 comprises a Xilinx Kintex Ultrascale KU060 user programmable FPGA. Most of the logic, block RAM and all DSP resources are available for customer processing. With the KU060 FPGA the LXF33K00 offers; 663 K logics cells, 1,080 36 Kbit RAM blocs, 3 PCIe interface blocks and 2,760 DSP48 slices. The FPGA speed grade is -2. The LXF3000 FPGA connects to one 72 bits wide DDR4 memory bank, offering a total of 4GB of storage with error correction codes. At 2400 Mhz the memory bank offers a total bandwidth of 21.6 GB/s. For FPGA configuration the LXF33K00 has a 64MB QSPI FLASH memory.
VPX interface
At the P1 connector the LXF33K00 has two fat pipes that form the data plane. At the expansion plane on P1 there are also two FAT pipes. Each fat pipe can be divided into two thin pipes or four ultra thin pipes. A total of thirty-two user definable LVDS signals connect between the FPGA and the VPX P2 connector. Two types of cooling are supported by the LXF33K00. For the harsher environmental conditions, the board can be ordered in the conduction cooled version. Otherwise the board is available in an air-cooled version.
Applicatons
Systems that will beneft greatly from this product are: 

• Advanced digital radio frequency memory (DRFM)
• Radar waveform generators and receivers
• Telecommunicaton systems
• Experimental Physics
• Analog record and playback systems
• Aerospace and test instrumentation
• Software defined radio (SDR)

Contact us for more information.]]> Thu, 14 May 2020 10:19:08 +0000 LXD11K4 quad ADC FMC Module
The LXD11K4 provides four 16-bit A/D channels with up to 310 Msps data rate. All the data interfaces are based on LVCMOS and LVDS signalling. The design is based on the Analog devices AD9652 analog to digital converters.
Analog input and output
Depending on the application requirements it is possible to order the LXD11K4 with either a DC coupled or an AC coupled analog front end. The DC coupled interface is meant for signal acquisitions in the first Nyquist zone while the AC coupled inputs also offers the option for signal acquisition in the second Nyquist zone.
16 bit
The ADCs offer 16-bits resolution further contributing to achieve best in class signal to noise ratios.
LVDS signaling
The ADC devices make use of LVDS signaling for their data interfaces. This allows easy integration of the LXD11K4 into user FPGA designs without the need to acquire expensive and complex JESD204B interface cores. Furthermore the low pin count implementation make sure the card can be used on all Xilinx development boards as well as the Logic-X FPGA FMC carrier boards.
Clock tree
The onboard low noise clock generator ensures easy integration into small single board systems as well as standalone operation. For larger systems it is possible to easily synchronize multiple boards by providing an external reference clock. This is a special feature offered by the onboard clock PLL.
Applicatons
Systems that will beneft greatly from this product are: 

• MIMO Applications
• Radar waveform receivers
• Digital Beam Forming
• Medical systems
• Telecommunicaton systems
• Experimental Physics
• Analog playback systems
• Aerospace and test instrumentation
• Software defined radio (SDR)

Contact us for more information.]]> Thu, 14 May 2020 09:39:51 +0000 LXD11K8 Octal ADC FMC Module
The LXD11K8 provides eight 16-bit A/D channels with up to 310 Msps data rate. All the data interfaces are based on LVCMOS and LVDS signalling. The design is based on the Analog devices AD9652 analog to digital converters.
Analog input and output
Depending on the application requirements it is possible to order the LXD11K8 with either a DC coupled or an AC coupled analog front end. The DC coupled interface is meant for signal acquisitions in the first Nyquist zone while the AC coupled inputs also offers the option for signal acquisition in the second Nyquist zone.
16 bit
The ADCs offer 16-bits resolution further contributing to achieve best in class signal to noise ratios.
LVDS signaling
The ADC devices make use of LVDS signaling for their data interfaces. This allows easy integration of the LXD11K8 into user FPGA designs without the need to acquire expensive and complex JESD204B interface cores. Furthermore the low pin count implementation make sure the card can be used on all Xilinx development boards as well as the Logic-X FPGA FMC carrier boards.
Clock tree
The onboard low noise clock generator ensures easy integration into small single board systems as well as standalone operation. For larger systems it is possible to easily synchronize multiple boards by providing an external reference clock. This is a special feature offered by the onboard clock PLL.
Applicatons
Systems that will beneft greatly from this product are: 

• MIMO Applications
• Radar waveform receivers
• Digital Beam Forming
• Medical systems
• Telecommunicaton systems
• Experimental Physics
• Analog playback systems
• Aerospace and test instrumentation
• Software defined radio (SDR)

Contact us for more information.]]> Thu, 14 May 2020 09:34:02 +0000 LXD31K2 Dual MIMO FMC Module
The LXD31K2 provides two 16-bit A/D channels with up to 310 Msps data rate and two 16-bit D/A channels with up to 310 Msps data rate with a 1.24 Gsps update rate. All the data interfaces are based on LVCMOS and LVDS signalling.The design is based on the Analog devices AD9652 analog to digital converters and the Analog devices AD9142A digital to analog converters.
Analog input and output
Depending on the application requirements it is possible to order the LXD31K2 with either a DC coupled or an AC coupled analog front end. The DC coupled interface is meant for signal acquisitions and playback in the first Nyquist zone while the AC coupled inputs also offers the option for signal acquisition and playback in the second Nyquist zone.
16 bit
Both the ADC and DAC offer 16-bits resolution further contributing to achieve best in class signal to noise ratios.
LVDS signaling
Both the ADC and DAC device make use of LVDS signaling for their data interfaces. This allows easy integration of the LXD31K2 into user FPGA designs without the need to acquire expensive and complex JESD204B interface cores. Thanks to the low pin count implementation the LXD31K2 will work on all Xilinx development boards as well as the Logic-X FPGA FMC carrier boards.
Clock tree
The onboard low noise clock generator ensures easy integration into small single board systems as well as standalone operation. For larger systems it is possible to easily synchronize multiple boards by providing an external reference clock. This is a special feature offered by the onboard clock PLL.
Applicatons
Systems that will beneft greatly from this product are: 

• MIMO Applications
• Radar waveform generators and receivers
• Digital Beam Forming
• Medical systems
• Telecommunicaton systems
• Experimental Physics
• Analog playback systems
• Aerospace and test instrumentation
• Software defined radio (SDR)

Contact us for more information.]]> Thu, 14 May 2020 09:15:12 +0000 LXD21K4 Quad channel DAC FMC Module
The LXD21K4 provides four 16-bit D/A channels with up to 310 Msps data rate and a 1.24 Gsps update rate. This is the only FMC card on the market to offer this number of channels with LVDS digital signalling interfaces. The design is based on the Analog devices AD9142A digital to analog converters.
Analog input and output
Depending on the application requirements it is possible to order the LXD21K4 with either a DC coupled or an AC coupled analog front end. The DC coupled interface is meant for signal acquisitions and playback in the first Nyquist zone while the AC coupled inputs also offers the option for signal acquisition and playback in the second Nyquist zone.
16 bit
The DAC offers 16-bits resolution further contributing to achieve best in class signal to noise ratios.
LVDS signaling
The DAC devices make use of LVDS signaling for their data interfaces. This allows easy integration of the LXD21K4 into user FPGA designs without the need to acquire expensive and complex JESD204B interface cores. Thanks to the low pin count implementation the LXD21K4 will work on all Xilinx development boards as well as the Logic-X FPGA FMC carrier boards.The DAC devices make use of LVDS signaling for their data interfaces. This allows easy integration of the LXD21K4 into user FPGA designs without the need to acquire expensive and complex JESD204B interface cores. Thanks to the low pin count implementation the LXD21K4 will work on all Xilinx development boards as well as the Logic-X FPGA FMC carrier boards.
Clock tree
The onboard low noise clock generator ensures easy integration into small single board systems as well as standalone operation. For larger systems it is possible to easily synchronize multiple boards by providing an external reference clock. This is a special feature offered by the onboard clock PLL.
Applicatons
Systems that will beneft greatly from this product are: 

• MIMO Applications
• Radar waveform generators
• Digital Beam Forming
• Medical systems
• Telecommunicaton systems
• Experimental Physics
• Analog playback systems
• Aerospace and test instrumentation
• Software defined radio (SDR)

Contact us for more information.]]> Thu, 14 May 2020 09:06:35 +0000 LXD31K4 Quad MIMO FMC Module
The LXD31K4 provides four 16-bit A/D channels with up to 310 Msps data rate and four 16-bit D/A channels with up to 310 Msps data rate with a 1.24 Gsps update rate. This is the only FMC card on the market to offer this number of channels with LVDS digital signalling interfaces. The design is based on the Analog devices AD9652 analog to digital converters and the Analog devices AD9142A digital to analog converters.
Analog input and output
Depending on the application requirements it is possible to order the LXD31K4 with either a DC coupled or an AC coupled analog front end. The DC coupled interface is meant for signal acquisitions and playback in the first Nyquist zone while the AC coupled inputs also offers the option for signal acquisition and playback in the second Nyquist zone.
16 bit
Both the ADC and DAC offer 16-bits resolution further contributing to achieve best in class signal to noise ratios.
LVDS signaling
Both the ADC and DAC device make use of LVDS signaling for their data interfaces. This allows easy integration of the LXD31K4 into user FPGA designs without the need to acquire expensive and complex JESD204B interface cores. Furthermore the pinout is chosen in a way that it will work on most of the partial implementations of the high pin count connectors on Xilinx development boards as well as the Logic-X FPGA FMC carrier boards.
Clock tree
The onboard low noise clock generator ensures easy integration into small single board systems as well as standalone operation. For larger systems it is possible to easily synchronize multiple boards by providing an external reference clock. This is a special feature offered by the onboard clock PLL.
Applicatons
Systems that will beneft greatly from this product are: 

• MIMO Applications
• Radar waveform generators and receivers
• Digital Beam Forming
• Medical systems
• Telecommunicaton systems
• Experimental Physics
• Analog record and playback systems
• Aerospace and test instrumentation
• Software defined radio (SDR)

Contact us for more information.]]> Thu, 14 May 2020 08:34:57 +0000 Analog output
The analog output offers a lowe latency (1.2 ns) from FPGA to RF using the EV12DS480 DAC device from E2V. The product has an output bandwidth from 0.5MHz to 6GHz. The instantaneous output bandwidth is up-to 1.35 GHz. Thanks to the unique operating modes of the EV12DS460 it is possible to place the signal into the higher Nyquist bands.
12 bit
The DAC offers a 12-bits resolution further contributing to achieve best in class signal to noise ratios.
Low Latency
It is possible to achieve a very low latency from the RF input to the RF output because of the LVDS connectvity to the host carrier. This can be less than 18 ns, depending on the carrier that is used.
Clock tree
The onboard low noise clock generator ensures easy integraton into small single channel systems as well as standalone operaton. For larger systems it is possible to directly provide the sample clock to the front panel SSMC connector or to synchronize the local clock generator to an external reference clock.
Applicatons
Systems that will beneft greatly from this product are: 

• Electronic Warfare systems
• Radar waveform generators and receivers
• Advanced digital radio frequency memory (DRFM) systems
• Medical systems
• Telecommunicaton systems 
• and many more. 

Contact us for more information.]]> Tue, 21 Apr 2020 08:02:18 +0000 Analog input
With an analog input stage that has a very wide input bandwidth from 0.5MHz up-to 4.8GHz and the low latency 5.4Gsps ADC from E2V (EV12AS350A) the LXD30000 delivers unmatched performance with regards to SFDR, close in phase noise and latency (7.2 ns) on its analog input channel. Sampling at 5.4 Gsps offers an instantaneous bandwidth of 2.7GHz.
12 bit
The ADC offers 12-bits resolution further contributing to achieve best in class signal to noise ratios.
Low Latency
It is possible to achieve a very low latency from the RF input to the RF output because of the LVDS connectvity to the host carrier. This can be less than 18 ns, depending on the carrier that is used.
Clock tree
The onboard low noise clock generator ensures easy integraton into small single channel systems as well as standalone operaton. For larger systems it is possible to directly provide the sample clock to the front panel SSMC connector or to synchronize the local clock generator to an external reference clock.
Applicatons
Systems that will beneft greatly from this product are: 

• Electronic Warfare systems
• Radar waveform generators and receivers
• Advanced digital radio frequency memory (DRFM) systems
• Medical systems
• Telecommunicaton systems 
• and many more. 

Contact us for more information.]]> Tue, 21 Apr 2020 07:56:40 +0000 Analog input
With an analog input stage that has a very wide input bandwidth from 0.5MHz up-to 4.8GHz and the low latency 5.4Gsps ADC from E2V (EV12AS350A) the LXD30K0 delivers unmatched performance with regards to SFDR, close in phase noise and latency (7.2 ns). Sampling at 5.4 Gsps offers an instantaneous bandwidth of 2.7GHz.
Analog output
Surpassing the analog input, the analog output offers an even lower latency (1.2 ns) using the EV12DS460 DAC device from E2V. The output bandwidth ranges from 0.5MHz to 6GHz and the instantaneous output bandwidth is 1.35GHz.
12 bit
Both the ADC and DAC offer 12-bits resolution further contributng to achieve best in class signal to noise ratios.
Low Latency
It is possible to achieve a very low latency from the RF input to the RF output because of the LVDS connectvity to the host carrier. This can be less than 18 ns, depending on the carrier that is used.
Clock tree
The onboard low noise clock generator ensures easy integraton into small single channel systems as well as standalone operaton. For larger systems it is possible to directly provide the sample clock to the front panel SSMC connector or to synchronize the local clock generator to an external reference clock.
Applicatons
Systems that will beneft greatly from this product are: 

• Electronic Warfare systems
• Radar waveform generators and receivers
• Advanced digital radio frequency memory (DRFM) systems
• Medical systems
• Telecommunicaton systems 
• and many more. 

Contact us for more information.]]> Fri, 26 Apr 2019 14:44:39 +0000 Powerful Compute Units
 Using this device makes this platform a powerful application processing unit based on a Quad-core ARM Cortex-A53 combined with a real time processing unit built around the Dual-core ARM Cortex-R5. Furthermore, there is the option for an ARM Mali-400 MP2 graphics processing unit and an on-chip H.264/H.265 CODEC1.  All this processing power is combined with a Programmable logic section of up to 256K logic cells, 1248 DSP slices and 25Mbits memory.
Large Memory
The processing system is connected to a 2400 Mb/s DDR4 memory bank that is 64 bits wide and offers a total memory density of 4GB. This memory is complemented with several FLASH storage options based on onboard QSPI FLASH, SD card storage, upto 64GB onboard FLASH drive and an M.2 expansion slot (2280). 
System IO
External interfaces to the Processing system comprise of a dual 1G Ethernet port, one mini DisplayPort, a type A USB2.0 port, a dual UART over USB port and a single SMA for GPIO. 
Adaptable Logic
The Programmable logic connects to an FMC (VITA 57.1) site that allows flexible IO expansion through a wide range of Commercial off the shelf FMC products. These can add for example Analog IO, Digital IO, RF IO or Video IO functionality to the LXF90K0 platform.  In addition, the programmable logic has two GPIOs that connect to an MMCX connector and two six pin PMOD interfaces. The PMOD interfaces can be used to connect low frequency, low I/O pin count peripheral modules to the processor system or the programmable logic. 
Typical Applications

• Electronic Warfare Multi channel digital receivers Satellite communication Edge Artificial Intelligence

Contact us for more information.
 ]]> Wed, 17 Apr 2019 07:56:54 +0000